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    Text: 1CY7C1373B CY7C1371B CY7C1373B PRELIMINARY 512Kx36/1Mx18 Flow-Thru SRAM with NoBL Architecture Features spectively, designed to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371B/CY7C1373B are equipped with the advanced No


    Original     		PDF 1CY7C1373B CY7C1371B CY7C1373B 512Kx36/1Mx18 CY7C1371B/CY7C1373B

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    Text: 1CY7C1373BV25 CY7C1371BV25 CY7C1373BV25 PRELIMINARY 512Kx36/1Mx18 Flow-Thru SRAM with NoBL Architecture Features respectively, designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371BV25/CY7C1373BV25 is


    Original     		PDF 1CY7C1373BV25 CY7C1371BV25 CY7C1373BV25 512Kx36/1Mx18 133-MHz 117-MHz 100-MHz