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    W L Gore & Associates 0XR01R01048.0

    RF Test Cables 18GHz 48"L Rgd MinCP EndA SMA EndB SMA
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    W L Gore & Associates 0XQ01R01060.0

    RF Test Cables 18GHz 60"Lng Ruggdzd EndA N EndB SMA
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    W L Gore & Associates 0XR01R01012.0

    RF Test Cables 18GHz 12"L Rgd MinCP EndA SMA EndB SMA
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    W L Gore & Associates 0XR01R01024.0

    RF Test Cables 18GHz 24"L Rgd MinCP EndA SMA EndB SMA
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    W L Gore & Associates 0XR01R02012.0

    RF Test Cables 18GHz 12"L Rgd MinCP EndA SMA EndB SMA
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    0X00000000000000 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MAX9263

    Abstract: MAX9264 prng IEC ACB symbols PJ 62 SPREAD-SPECTRUM SYSTEM
    Text: 19-5644; Rev 1; 3/11 TION KIT EVALUA BLE IL AVA A HDCP Gigabit Multimedia Serial Link Serializer/Deserializer The MAX9263/MAX9264 chipset extends Maxim’s gigabit multimedia serial link GMSL technology to include highbandwidth digital content protection (HDCP) encryption


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    PDF MAX9263/MAX9264 MAX9263 MAX9264 MAX9263/MAX9264 prng IEC ACB symbols PJ 62 SPREAD-SPECTRUM SYSTEM

    MC9SO8QE32

    Abstract: XBee-PRO ZB S2B Xbee Pro Series 2 Ember EM357 Ember EM357 SPI register Xbee Pro ZS2010 ZigBee Cluster Library Specification Xbee zb smt pin diagram and of xbee
    Text: XBee /XBee-PRO® ZB SMT RF Modules ZigBee RF Modules by Digi International Models: XBEE S2C, PRO S2C Hardware: S2C Firmware: 401x Digi International Inc. 11001 Bren Road East Minnetonka, MN 55343 877 912-3444 or 952 912-3444 http://www.digi.com 90002002_A


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    PDF

    AN2028

    Abstract: AN33 Zilker Labs
    Text: Loading Configuration Files in a Manufacturing Environment Application Note May 01, 2009 AN2028.0 Introduction This document provides a summary of the process methodologies and necessary steps for loading a configuration file into the non-volatile memory of a Zilker Labs Digital-DC power controller.


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    PDF AN2028 AN33 Zilker Labs

    AN2035

    Abstract: A-100 AN2013 AN2026 AN2031 AN2033 ZL2005 change security level 0x000000000000000000
    Text: Writing Configuration Files for Zilker May 01, 2009 Application Note AN2031.0 Introduction Zilker Labs Digital-DC devices must be configured through pin-strap settings or by using PMBus™ commands. A configuration file is a human-readable text file that contains a sequence of PMBus commands


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    PDF AN2031 AN2035 A-100 AN2013 AN2026 AN2033 ZL2005 change security level 0x000000000000000000

    LSI53C896

    Abstract: ami 2109 el 7406 LSI53C876 PAR64 ADB 424 D3318
    Text: TECHNICAL MANUAL LSI53C896 PCI to Dual Channel Ultra2 SCSI Multifunction Controller Version 3.2 April 2001 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties


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    PDF LSI53C896 DB14-000083-03, LSI53C896 D-33181 D-85540 ami 2109 el 7406 LSI53C876 PAR64 ADB 424 D3318

    Untitled

    Abstract: No abstract text available
    Text: M24SR64-Y Dynamic NFC/RFID tag IC with 64-Kbit EEPROM, NFC Forum Type 4 Tag and I²C interface Datasheet - production data Package • 8-lead small-outline package SO8 ECOPACK 2 SO8 (MN) UFDFPN8 (MC) TSSOP8 (DW) • TSSOP8 ECOPACK®2 • UFDFPN8 ECOPACK®2


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    PDF M24SR64-Y 64-Kbit SB12I) M24SR64-Y DocID023790

    UCD90120

    Abstract: i2c project
    Text: NOT RECOMMENDED FOR NEW DESIGNS UCD90120 www.ti.com. SLVS966 – SEPTEMBER 2009


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    PDF UCD90120 SLVS966 UCD90120 12-Channel 12-bit i2c project

    Untitled

    Abstract: No abstract text available
    Text: M24SR04-Y Dynamic NFC/RFID tag IC with 4-Kbit EEPROM, NFC Forum Type 4 Tag and I²C interface Datasheet - production data Package • 8-lead small-outline package SO8 ECOPACK 2 • TSSOP8 ECOPACK®2 SO8 (MN) TSSOP8 (DW) UFDFPN8 (MC) • UFDFPN8 ECOPACK®2


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    PDF M24SR04-Y M24SR04-Y DocID024754

    AMBA AXI4 verilog code

    Abstract: ZYNQ-7000 BFM 20/ZYNQ-7000 BFM
    Text: LogiCORE IP AXI Bus Functional Models v3.00.a DS824 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The Xilinx LogiCORE IP AXI Bus Functional Models (BFMs), developed for Xilinx by Cadence Design Systems, support the simulation of


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    PDF DS824 AMBA AXI4 verilog code ZYNQ-7000 BFM 20/ZYNQ-7000 BFM

    Untitled

    Abstract: No abstract text available
    Text: About This Manual This document provides the user with details in setting up and using the FreeStar evaluation kit Part # FS24-100ST-KIT . The document also provides information and references for software developers to write applications for use with the FreeStar module (Part # FS24-100ST).


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    PDF FS24-100ST-KIT) FS24-100ST) 70-03E

    lfxp2-40e

    Abstract: LVCMOS25 LD48 LFXP2-17E-5FTN256C HB1004 ispLEVER project Navigator route place LFXP2-5E-5QN IPUG35 LFXP2-8E
    Text: LatticeXP2 Family Handbook HB1004 Version 02.9, May 2011 LatticeXP2 Family Handbook Table of Contents May 2011 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1


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    PDF HB1004 TN1144 TN1220. TN1143 lfxp2-40e LVCMOS25 LD48 LFXP2-17E-5FTN256C ispLEVER project Navigator route place LFXP2-5E-5QN IPUG35 LFXP2-8E

    IDT79RV4700

    Abstract: R3051 R3052 R3081 R36100 R4650 R5000
    Text: Integrated Device Technology, Inc. IDT79RV4700 RISC Processor Hardware User’s Manual Version 2.1 December 1997 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1997 Integrated Device Technology, Inc.


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    PDF IDT79RV4700TM IDT79RV4700 R3051 R3052 R3081 R36100 R4650 R5000

    PPC405D4

    Abstract: IBM powerpc 405gp NP4GS3 PVA c17 13n07 LP1 K09 marking a00b TDA 2040 XC5 539 405GP
    Text:  IBM PowerNP NP2G Network Processor Preliminary February 12, 2003  0.1 Copyright and Disclaimer  Copyright International Business Machines Corporation 2003 All Rights Reserved US Government Users Restricted Rights - Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp.


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    PDF IBM32NP160EPXCAA133. PPC405D4 IBM powerpc 405gp NP4GS3 PVA c17 13n07 LP1 K09 marking a00b TDA 2040 XC5 539 405GP

    Smart Core Z2

    Abstract: implementation of data convolution algorithms in c code for convolution NM6403 TMS320C8X implementation of data convolution algorithms convolution implementation in c language wj m12
    Text: Effective Implementation of Convolution Filters on NeuroMatrix Core Vitali Kashkarov th Research Center MODULE, 3 Eight March 4 Street, Box 166, Moscow, 125190, Russia, tel. +7-095-152-9802, fax. +7-095-152-4661, e-mail: [email protected] 1. INTRODUCTION Digital signal processing technologies boosting


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    PDF NM6403 TMS320C8X BPRA059, NM6403 Smart Core Z2 implementation of data convolution algorithms in c code for convolution TMS320C8X implementation of data convolution algorithms convolution implementation in c language wj m12

    LCMXO2-1200HC-4TG100C

    Abstract: LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC
    Text: MachXO2 Family Handbook HB1010 Version 01.0, November 2010 MachXO2 Family Handbook Table of Contents November 2010 Section I. MachXO2 Family Data Sheet Introduction Features . 1-1


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    PDF HB1010 LCMXO2-1200HC-4TG100C LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC

    Untitled

    Abstract: No abstract text available
    Text: MAX9275/MAX9279 3.12Gbps GMSL Serializers for Coax or STP Output Drive and Parallel Input General Description Benefits and Features The audio channel supports L-PCM I2S stereo and up to eight channels of L-PCM in TDM mode. Sample rates of 32kHz to 192kHz are supported with sample depth up to


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    PDF MAX9275/MAX9279 12Gbps 32kHz 192kHz 25MHz 104MHz MAX9275/MAX9279

    Untitled

    Abstract: No abstract text available
    Text: EVALUATION KIT AVAILABLE MAX9277/MAX9281 General Description The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Serial Link GMSL serializers with 3- or 4-data lane LVDS input (oLDI) and a CML serial output programmable for 50Ω coax or 100Ω shielded twisted pair (STP) cable drive.


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    PDF MAX9277/MAX9281 MAX9277/MAX9281 12Gbps MAX9281 MAX9277. 100mV 500mV 400mV

    Untitled

    Abstract: No abstract text available
    Text: XE1431 Bluetooth SoC VREGA RC Oscillator VREGD] Power Management VDDBAT VREF Memory VREG_OFF Boot Loader Bluetooth Sequencer MOSI CPU NSS[4:0] RADIO SPI ROM SCK radio inputs Interface radio outputs MISO VMIC_P VMIC_N NRESET CODEC PA[7:0] GPIO/UART PB[7:0]


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    PDF XE1431 XE1431

    Untitled

    Abstract: No abstract text available
    Text: M24SR04-Y Dynamic NFC/RFID tag IC with 4-Kbit EEPROM, NFC Forum Type 4 Tag and I²C interface Datasheet - preliminary data Package • 8-lead small-outline package SO8 ECOPACK 2 • TSSOP8 ECOPACK®2 SO8 (MN) TSSOP8 (DW) UFDFPN8 (MC) • UFDFPN8 ECOPACK®2


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    PDF M24SR04-Y M24SR04-Y DocID024754

    Untitled

    Abstract: No abstract text available
    Text: M24SR04-Y Dynamic NFC/RFID tag IC with 4-Kbit EEPROM, NFC Forum Type 4 Tag and I²C interface Datasheet - production data Package • 8-lead small-outline package SO8 ECOPACK 2 • TSSOP8 ECOPACK®2 SO8 (MN) TSSOP8 (DW) UFDFPN8 (MC) • UFDFPN8 ECOPACK®2


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    PDF M24SR04-Y M24SR04-Y DocID024754

    Untitled

    Abstract: No abstract text available
    Text: EVALUATION KIT AVAILABLE MAX9277/MAX9281 General Description The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Serial Link GMSL serializers with 3- or 4-data lane LVDS input (oLDI) and a CML serial output programmable for 50Ω coax or 100Ω shielded twisted pair (STP) cable drive.


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    PDF MAX9277/MAX9281 MAX9277/MAX9281 12Gbps MAX9281 MAX9277. 100mV 500mV 400mV

    ZigBee Specification, Document 053474r13

    Abstract: zigbee document 053474r06 version 1.0 ZigBee Specification, Document 053474r06 053474r13 ZigBee Specification document nt 101 thermostat PIN DIAGRAM OF ZIGBEE relays BTR R 272 LM 317 IC LM 393 ST
    Text: ZigBee Specification Document 053474r13 ZIGBEE SPECIFICATION ZigBee Document 053474r13 December 1, 2006 3:10 pm Sponsored by: ZigBee Alliance Accepted by This document has not been accepted by the Alliance BOD. Abstract The ZigBee Specification describes the infrastructure and services


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    PDF 053474r13 64-bit ZigBee Specification, Document 053474r13 zigbee document 053474r06 version 1.0 ZigBee Specification, Document 053474r06 053474r13 ZigBee Specification document nt 101 thermostat PIN DIAGRAM OF ZIGBEE relays BTR R 272 LM 317 IC LM 393 ST

    B.A 2ND HP DATE SHEET 2011

    Abstract: SH-2E Assembly Programming language diode LT 42 PR 3002 tea 2030 FR81 2-digit object counter circuit MD 2147 H SH 2104 T 2109 TEA 2111
    Text: To all our customers Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog


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    PDF

    Untitled

    Abstract: No abstract text available
    Text: M24SR04-Y Dynamic NFC/RFID tag IC with 4-Kbit EEPROM, NFC Forum Type 4 Tag and I²C interface Datasheet - production data Package • 8-lead small-outline package SO8 ECOPACK 2 SO8 (MN) TSSOP8 (DW) UFDFPN8 (MC) • TSSOP8 ECOPACK®2 • UFDFPN8 ECOPACK®2


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    PDF M24SR04-Y M24SR04-Y DocID024754